1. Field of the Invention
The present invention relates to a method and apparatus for high address resolution rasterization and, more specifically, to a method and apparatus for high address resolution rasterization using low address resolution rasterization and printing systems.
2. Prior Art
It is known to increase the address resolution of rasterized displays through one of a number of techniques. One method of improving address resolution is to increase "pixel" density and decrease the diameter of each individual pixel. Such a method yields improved address resolution, however, the ability to decrease the diameter of pixels and to increase the density is limited in most applications.
In a second method for improving address resolution, it is known to allow pixels to increase in density and be offset from each other with some degree of overlap between adjacent pixels. For example, referring to FIG. 1(a), two columns of pixels 101 and 102 are shown. In this example, each of the pixels of column 102 are offset slightly from the pixels of column 101. A specific application of this technique is shown with reference to FIG. 1(b). The letter "A" 103 is shown represented as a plurality of overlapping and offset pixels. This method is utilized by a number of dot matrix printer companies to produce what is often referred to as "near-letter-quality" print.
Other pertinent art includes a method, utilized by the Spectrum C2500 Series Plotter manufactured by Versatec of Santa Clara, Calif., in which low address resolution plot data is accepted and utilizes for plotting at a plotter's normal plotting address resolution. Referring to FIG. 1(c), when data is outputted by the plotter, each input bit to the plotter (represented by a darkened pixel in FIG. 1(c)), such as bit 105, is translated into a 2.times.2 pixel area, such as area 104. In FIG. 1(c), bits added by the translation are not blackened. A smoothing algorithm is define to minimize two-pixel steps on nonorthogonal lines. The bits added by this smoothing algorithm, such as bit 106, are indicated in FIG. 1(c) with hash marks.
It is further known to utilize a rasterization system in the fabrication of photolithographically formed patterns for production of integrated circuits. Such a system is disclosed in copending application entitled "RASTERIZER FOR PATTERN GENERATOR", Ser. No. 784,856, filed Oct. 4, 1985 and assigned to the assignee of the present application.
It is desired to develop an improved technique for providing high address resolution output from a low address resolution system and, more specifically, to develop such a system for use with a rasterizer used in the generation of photolithographically formed patterns.